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Ordering number : EN5973
LA6543
Monolithic Linear IC
LA6543
4-Channel Bridge (BTL) Driver for CD-ROM
Overview
The LA6543 is a 4-channel bridge (BTL) driver developed for CD-ROM applications.
Package Dimensions
unit: mm 3219-QFP34HC
[LA6543]
1.6 13.2 10.0
23 24
Features and Functions
* Integrated 4-channel power amplifier with bridge circuit (BTL) (two output stage power supply lines) * IOmax: 1A * Integrated level shift circuit * Integrated muting circuit MUTE: Output OFF at Low, output ON at High. MUTE1 is for channels 1 and 2, and MUTE2 for channels 3 and 4. * Integrated thermal shutdown circuit * Divided output stage power supply (VS1: CH1, CH2, CH3; VS2: CH4)
1.6 1.0
4.8
0.8
18
1.0
0.2
17
13.2 10.0
0.8
0.35
34 1 6
7
4.0
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage 1 Maximum supply voltage 2 Maximum input voltage Mute pin voltage Allowable power dissipation Operating temperature Storage temperature Symbol Conditions Ratings 14 Unit V V V V W C C
VCCmax VSmax VINmax VMUTEmax
Pd max Topr Tstg IC only
VS1, 2 Input pins V IN1 to 4
0.1
SANYO : QFP34HC
2.2
2.45max
14 13 13 0.77 -20 to +75 -55 to +150
Operating Conditions at Ta = 25C
Parameter Recommended operation voltage 1 Recommended operation voltage 2-1 Recommended operation voltage 2-2 Symbol Conditions Ratings 4 to 13 Unit V V V
VCC VS1 VS 2 VS1: CH1 to CH3 VS2: CH4 output reference power supply
4 to 13 4 to 13
* V CC VS1, 2
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N1798RM(KI) No. 5973-1/7
0.8
11.6
8.4
LA6543
Electrical Characteristics at VCC = 12V, VS1 = 5V, VS2 = 12V, Ta = 25C
Parameter
VCC no-load current drain
Symbol
Conditions min All outputs ON (MUTE1, MUTE2: High) All outputs OFF (MUTE1, MUTE2: Low) CH1 ON (MUTE1, MUTE2: High) CH1 OFF (MUTE1, MUTE2: Low) CH2 to CH4 ON (MUTE1, MUTE2: High) CH2 to CH4 OFF (MUTE1, MUTE2: Low) -50 0.5 4.4 5
Ratings typ 10 5 20 max 20 10 40 4 5 10 4 50 5 4.7 Unit mA mA mA mA mA mA mV V V
ICC1 ICC2 IS1-1
IS1-2 IS2-1 IS2-2
VS1 no-load current drain
VS2 no-load current drain
Output offset voltage Input voltage range Output voltage (source)
V OFF1 to4 Potential difference between plus and minus outputs for CH1 to CH4 VIN
Input voltage range forV IN1 to VIN4
VO source Plus and minus outputs at high level IO = 700 mA
(sink)
VO sink
Plus and minus outputs at low level
IO = 700 mA
0.3
0.6
V
Closed circuit voltage gain1 Closed circuit voltage gain2 Slew rate Mute ON voltage Mute ON current
VG1 VG2 SR
V MUTE IMUTE
Voltage gain between CH1 to CH3 BTL amplifiers Voltage gain between CH4 BTL amplifiers (Note 1) MUTE1, MUTE2 voltage when output is ON (Note 2) MUTE1, MUTE2 voltage when output is ON (Note 2)
7 14 0.5 1.5 6 2 10
dB dB V/s V A
Note 1: Guaranteed design value Note 2: MUTE turns amplifier output ON at High and OFF at Low. (At Low, output impedance becomes high.) MUTE1 and MUTE2 operate independently on the respective channels.
Allowable power dissipation, Pd max - W
1.0
Pd max - Ta
0.8
IC Only
0.77
0.6 0.46 0.4
0.2
0 -20
0
20
40
60
80
100
Ambient temperature, Ta - C
No. 5973-2/7
LA6543 Pin Assignment
VREF-OUT VREF-IN MUTE2
VCC
RF
23
22
21
20
RF
19
18
VG4 24 VIN4 25 VG3 26 VIN3 27
17 VO8 16 VO7 15 VS2 14 NC
LA6543
VG2 28 VIN2 29 NC 30 VG1 31 VIN1 32 MUTE1 33 NC 34
13 VO6 12 VO5 11 VO4 10 VO3 9 VS1 8 VO2 7 VO1
Heat sink
1
VSS2-OUT
2
VSS2
3
RF
4
RF
5
VSS1
6
VSS1-OUT
Top view
A11146
No. 5973-3/7
LA6543 Pin Function
Pin number
1 2 3,4 20,21 7 8 10 11 12 13 16 17 9 15 5 6 14,30 34 18 24 26 28 31 25 27 29 32
Pin name
V SS2-OUT V SS2
RF
Equivalent circuit
Pin function
Output stage reference voltage
(V SS2-V BE)/2: typ)
Connect to V S 2
VS 9 15
Substrate (minimum potential) CH1 non-inverted output (CH1+) CH1 inverted output (CH1-) CH2 non-inverted output (CH2+) CH2 inverted output (CH2-) CH3 non-inverted output (CH3+)
4
V O1 VO2 V O3 V O4 V O5 V O6 V O7 VO8 VS 1 VS 2 V SS1 V SS1-OUT
NC
Drive circuit
VO 11 12 7 13 16 17
8 10
CH3 inverted output (CH3-) CH4 non-inverted output (CH4+) CH4 inverted output (CH4-)
A11144
3 20 RF 21
Power supply for output stage (CH1 to CH3) (CH4) Connect to V S 1 Output reference voltage May not be used. Output reference voltage
(V SS1/2: typ)
V REF-OUT
VG4 VG3
Drive circuit
22 VCC
(V REF buffer amplifier output)
Input pin for CH4 (gain adjustment) Input pin for CH3 (gain adjustment) Input pin for CH2 (gain adjustment) Input pin for CH1 (gain adjustment) Input pin for CH4 (fixed gain) Input pin for CH3 (fixed gain)
4
VG2 VG1
V IN4 V IN3 V IN2 V IN1
27 32 26 31 VG 28 24 VIN 29 25 11k
Input pin for CH2 (fixed gain) Input pin for CH1 (fixed gain)
3 20 RF 21 18 VREF OUT
A11143
19 22 23 33
V REF-IN V CC
Reference voltage input
(V REF buffer amplifier input)
Power supply
22 VCC
MUTE2 MUTE1
CH2-CH4 amplifier output ON/OFF CH1 amplifier output ON/OFF
33 23 MUTE To bias circuit 4 3 20 RF 21
A11145
No. 5973-4/7
LA6543 Block Diagram
VREF OUT
MUTE1
MUTE2
VS1
V82
Thermal shutdown
-
VREF IN
+
MUTE1 CH1 (VO1-VO2)
MUTE2 CH2 (VO3-VO4) CH3 (VO5-VO6) CH4 (VO7-VO8)
-
Level shift
VO1
+
VIN1 VG1
11 k
-
VO2
+
-
Level shift
VO3
+
VIN2 VG2
11 k
-
VO4
+
-
Level shift
VO5
+
VIN3 VG3
11 k
-
VO6
+
-
Level shift
VO7
+
VIN4 VG4
11 k
-
VO8
+
VSS2 VSS1
- - + +
VCC
VCC
RF
VSS1-OUT
VSS2-OUT
A11149
System Diagram (relationship between power supply and MUTE)
(MUTE1/MUTE2) MUTE1 CH1(VO1-VO2) (VS1/VS2)
CH2(VO3-VO4)
VS 1
MUTE2
CH3(VO5-VO6)
CH4(VO7-VO8)
VS 2
A11147
No. 5973-5/7
LA6543 Sample Application Circuit
Microprocessor
Reference voltage
23
MUTE2
22
VCC
21
RF
20
RF
19
VREF IN
18
VREF OUT
24 VG4 Sled input 25 VIN4 26 VG3 Tracking input 27 VIN3
VO8 17 M VO7 16 VS2 15 NC 14 12V power supply Sled
LA6543
28 VG2 Focus input 29 VIN2 30 NC 31 VG1 Loading input Microprocessor 32 VIN1 33 MUTE1
VSS2 OUT
VO6 13 Tracking VO5 12 VO4 11 Focus VO3 10 VS1 9 VO2 8
VSS1 OUT
Heat sink
5V power supply
M VO1 7
Loading
34 NC
VSS2
1
2
RF
3
VSS1
RF
4
5
6
A11148
No. 5973-6/7
LA6543 Gain Setting (input pins and adjustment pins)
A simplified diagram of VIN and VG is shown below. 1) Consider an 11 k (typ.) resistor inserted between VIN and VG. 2) When not the pin VG but the pin VIN is used alone, the BTL gain (between VO+ and V O-) is set to 7 dB for CH1 to CH3 (1 dB for AMP only). For CH4, it is 14 dB (8 dB for AMP only). This also applies for the case when VIN is not used and an 11 k external resistor is connected to VG for input. 3) Gain is set by the input impedance as seen from point A. When VG only is used and the external resistor is R, the BTL gain (between VO+ and VO- ) is 20 log (11 k /R) + 14 dB. When an 11 k resistor is inserted between VIN and VG, and input is via VIN , the combined resistance Rz as seen from point A is Rz = 5.5 k. Gain is CH1 to CH3 : 20 log (11 k/5.5 k) + 7 dB = 13 dB CH4 : 20 log (11 k/5.5 k) + 14 dB = 20 dB.
VG 11 k VIN Level shift - AMP1 + VO+
VREF VSS
- VREF1 +
A
CH4 only
- AMP2 +
VO-
11 k
- VREF2 +
11 k
A11150
GND
Offset Voltage
This IC incorporates a level shifter circuit. The input references the voltage VREF to be applied and references the voltage (VSS1)/2V for channels 1 to 3 or the voltage (VSS2-V BE (0.7))/2V for channel 4 to be output.
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of December, 1998. Specifications and information herein are subject to change without notice. PS No. 5973-7/7

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